Low Leakage Low Ground Bounce Noise Power Gating Techniques for FPGAs

Design complexity is increasing day by day in modern digital systems. Due to reconfigurable architecture, low non recurring engineering (NRE) and ease of design field programmable gate arrays (FPGA) become a better solution for managing increasing design complexity. Due to scaling trends FPGA uses more transistors which increase the leakage current. FPGAs are well suited for wireless applications since they provide high performance computation together with the capability to adapt to changing communication protocols. So if we are able to reduce the leakage power of an FPGA device, then it can be suitable for use in mobile as well as other low power and battery operated applications. So, this paper provides a detailed analysis of benchmark circuit 74182 a high speed carry look ahead adder by using low leakage low ground bounce noise power gating techniques. Techniques stacking power gating, Diode based stacking power gating, and Diode based staggered phase damping technique reduces peak of ground bounce noise and standby leakage current effectively. Diode based staggered phase damping technique is identified as most effective technique with 99% reduction in ground bounce noise and 75% reduction in leakage current. To evaluate the effectiveness of the power gating techniques, the simulation has been performed using BPTM 45nm technology at room temperature with supply voltage of 0.7V. To do the performance analysis we have implemented lookup table ( LUT) of benchmark circuit (74182) in Spartan-3ADSP, 90nm FPGA, Virtex-5, 65nm FPGA, Virtex-6 LP, 40nm FPGA and Kintex-7 FPGA. On comparison with conventional mode, diode based staggered phase damping technique is considered as best case power gating technique for leakage current while diode based stacking power gating technique is classified as best case power gating technique for ground bounce noise and average power with 99% reduction in ground bounce noise and 99.6% reduction in average power. All these results have been done using XILINX ISE 14.1 tool.